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Table 2 Performance comparison of Sequential, Lock-Based, Atomic IO and STM SIR implementations under varying cores with grid size of 51 × 51 (2601) agents

From: A tale of lock-free agents: towards Software Transactional Memory in parallel Agent-Based Simulation

CoresSequentialLock-Based NaiveLock-Based Read–WriteAtomic IOSTM
173.9 (2.06)59.2 (0.16)55.0 (0.22)51.0 (0.11)52.2 (0.23)
246.5 (0.05)40.8 (0.18)32.4 (0.09)33.2 (0.03)
344.2 (0.08)35.8 (0.06)25.5 (0.09)26.4 (0.05)
447.4 (0.12)34.0 (0.32)22.7 (0.08)23.3 (0.19)
548.1 (0.13)34.5 (0.06)22.6 (0.03)23.0 (0.06)
649.1 (0.09)34.8 (0.03)22.3 (0.09)23.1 (0.05)
749.8 (0.09)35.9 (0.15)22.8 (0.07)23.4 (0.22)
857.2 (0.06)40.4 (0.21)25.8 (0.02)26.2 (0.22)
  1. Best performance indicated in italic
  2. Timings in seconds (lower is better), standard deviation in parentheses