Table 3 Performance comparison of Lock-Based Read–Write, Atomic IO and STM SIR implementations with varying grid sizes on 4 cores
From: A tale of lock-free agents: towards Software Transactional Memory in parallel Agent-Based Simulation
Grid size | Lock-Based Read–Write | Atomic IO | STM |
|---|---|---|---|
101 × 101 (10,201) | 139.0 (0.15) | 91.1 (0.14) | 96.5 (0.27) |
151 × 151 (22,801) | 314.0 (0.67) | 204.0 (0.36) | 212.0 (0.16) |
201 × 201 (40,401) | 559.0 (1.22) | 360.0 (0.61) | 382.0 (0.85) |
251 × 251 (63,001) | 861.0 (0.62) | 571.0 (0.71) | 608.0 (1.20) |